Bashing AMD's new HyperTransport technology as limited, Intel is working on its own technology to speed up the I/O interconnect.
The PC platform is running out of gas, and the situation is fueling both Intel and AMD to come up with a solution fast. Sounds like an unlikely scenario when you consider that the latest notebook processors run at 1GHz. The problem, though, isn't with the microprocessor speed, but with the speed of data transfer between the microprocessor and other components inside the computer. The PCI bus, the IDE and AGP interfaces, and other existing I/O interconnects will not scale well into the future and are already bottlenecks in some cases.
Last month, AMD beat Intel to the punch by announcing its high-speed, packet-based, point-to-point interconnect solution called HyperTransport Technology (codenamed Lightning Data Transport). Naturally wanting to control the evolution of the PC platform, Intel announced yesterday at its Intel Developer Forum that it would work with the industry to design a preliminary spec for a far superior I/O interconnect architecture by Spring 2001.
Speaking at IDF, Louis Burns, Intel's aggressive new vice president and general manager of its Desktop Platforms Group - and former CIO -- declared AMD's new HyperTransport deficient as a long-term desktop I/O interconnect. Intel looked at AMD's HyperTransport Technology and questioned whether it had the capabilities and scalability inherent to support I/O interconnections for the next 10 years. "The answer was flat out 'no'", said Burns.
AMD's technology uses a full-duplex data channel as narrow as 2 bits or as wide as 32 bits, where upstream and downstream bandwidths can be independently defined and devices of varying interface widths can negotiate a common width to communicate. The interface provides up to 3.2GBps data throughput in each direction between two devices over a full 32 bit connection, which is far superior to PCI's theoretical limit of 132MBps. (Sustained throughput is only 40 to 80MBps, assuming there's no competing traffic on the bus.) AMD has enlisted over 100 partners to develop HyperTransport-based products, with the first due to ship later this year.
Intel's Answer
Not good enough, says Intel. Looking forward to 10GHz processors,
Burns said, third-generation I/O interconnect technology for desktop PCs needs to address several issues. The interconnect will need to handle 10GHz to 15GHz signaling rates. He claimed parallel buses have 1-GHz signaling limits, and basically run out of gas and get expensive at that level. Copper signaling rates between chips top out around 12GHz. Optical interconnects beyond 10GHz are also under consideration, he added. The new interconnect must be fully serial, and point-to-point (not a bus arrangement like PCI). It must also have a maximum bandwidth per-pin scalable to greater than 10Gbps (compared to 800Mbps per-pin in AMD's HyperTransport today). Finally, it must be flexible to adapt to the needs of end users and systems developers.
Intel, which has kick-started many important PC technology initiatives over the years, including PCI, USB, and AGP, claims its investment in platform infrastructure development will ensure that system designs are balanced, and advanced applications such as video and audio processing, speech recognition, 3D graphics, and image processing can be supported effectively. However, industry pundits contend that Intel's goal in driving platform improvements is an economic one: to maintain demand for faster processors. In fact, numerous business units inside Intel benefit from improved platform architecture as do hundreds of other companies.
We spoke with an AMD representative who said that Intel and Burns clearly do not understand the full capabilities and future directions of HyperTransport Technology. Let the games begin.
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