Dividing the market between two chip families is a solid strategy, he added. "The reality is you take US$45 billion server market and break it in two," HP's x86-based ProLiant servers for the bottom US$22.5 billion and Itanium-based Integrity servers for the other half, he said.
But that divide is somewhat artificial. AMD has made a series of server-oriented improvements to its x86 Opteron chip, making it a better competitor both to Itanium and to Xeon, Intel's x86 server chip. AMD beat Intel to market with useful x86 server features such dual-processing cores, lower power consumption and a 64-bit design -- the latter once one of the main advantages Itanium held over 32-bit x86 chips.
In a few short years, AMD's features drew IBM, Sun and even HP to offer Opteron servers, and the chip continues to make strides. In third-quarter shipments of x86 servers, AMD accounted for 5 percent in 2004 but 10 percent in 2005, according to Gartner, while revenue jumped from 4 percent to 8 percent.
In addition, some potential customers are put off by Intel's approach. The reason high-end x86 server start-up Fabric7 chose Opteron is that it easily works in systems with eight processor sockets, CEO Sharad Mehrotra said. "Intel doesn't want you to build greater than four-socket topologies of Xeon," he said.
Intel's moves to keep Xeon competitive hurt Itanium. "Once AMD showed Intel what do with x86 -- adding 64-bit support -- that was the end of Itanium right there. When Intel announced it was going to do (64-bit x86 chips), it was obvious Itanium was irrelevant for anything but the high end of the market," said Peter Glaskowsky, an Envisioneering analyst and chief architect of start-up MemoryLogix.
Back in the day
The Itanium project began in December 1988 as a secret HP research project to create a successor to the company's own PA-RISC processor family, according to HP Labs' then-chief Dick Lampman.
In 1993, HP approached Intel with the idea of collaborating, said Jerry Huck, HP's technical leader on the project. "Producing our own chips -- there was not enough volume, and the economics were not in our favor," he said of the company's decision not to build its own processors. "Intel floated to the top of the list pretty quickly as somebody with the resources that would make this work."
Peter Glaskowsky, analyst, Envisioneering
So far, none of those goals has been met.
The chip, initially code-named PA-WideWord, used an architecture called Explicitly Parallel Instruction Computing, or EPIC. HP hoped the design would execute more instructions in parallel by lining them up in advance for maximum speed. Those instructions are ordered by an advanced compiler -- the software that translates human-written programs into the code consumed by the actual processors. EPIC's compiler-oriented technique contrasts with RISC chips, which are geared to adapt to whatever software instructions are thrown at them.
In 1997, Intel and HP revealed more details, saying the Itanium design "is expected to advance the state of the art in processor technologies, specifically addressing the performance limitations found in today's RISC and CISC (complex instruction set computing) technologies." (x86 chips are CISC designs, though their external interfaces now cloak faster RISC-like cores.) Itanium also would provide "full compatibility for IA-32 (x86) applications and operating systems," Intel said in its press release.
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